5 exercises on HAL and driver terminology: HAL, BSP, peripheral driver, register map, and memory-mapped I/O. Advanced
0 / 5 completed
1 / 5
Your tech lead says: "Write your application code against the HAL — that way we can retarget it to any MCU without touching the business logic."
What is a HAL (Hardware Abstraction Layer)?
Correct: B. A HAL (Hardware Abstraction Layer) sits between application code and hardware. It exposes functions like HAL_UART_Transmit() instead of direct register writes. When you port the firmware to a new MCU, you replace the HAL implementation — not the application. STM32 HAL and Zephyr's driver model are well-known examples.
Layer
Responsibility
Example
Application
Business logic; calls HAL API
Read sensor, apply algorithm
HAL
Portable peripheral API
HAL_I2C_Master_Transmit()
Register level
MCU-specific hardware access
I2C->CR1 |= I2C_CR1_START
2 / 5
A project manager says: "The SoC vendor shipped a BSP for their evaluation board — it includes the startup files, linker scripts, and HAL implementations."
What is a BSP (Board Support Package)?
Correct: B. A BSP (Board Support Package) is the hardware-specific glue between an RTOS or OS and a physical board. It includes everything needed to boot and run: vector table, startup assembly, clock init, flash/RAM layout in linker scripts, and HAL driver implementations for that board's peripherals. Without a BSP you cannot run any software on new hardware.
BSP component
Purpose
Startup file (.s)
Sets up stack, copies .data, clears .bss, calls main()
Linker script (.ld)
Defines flash/SRAM regions for this board
HAL implementation
Board-specific peripheral drivers
Clock config
PLL/oscillator setup for the board's crystal
3 / 5
A teammate asks: "Can you write a peripheral driver for the LIS3DH accelerometer connected over SPI?"
What is a peripheral driver?
Correct: B. A peripheral driver abstracts a specific hardware component. For an LIS3DH it would handle the SPI transaction format, register addresses, initialization sequence, data-ready interrupt, and data conversion — exposing a simple API like lis3dh_read_accel(&x, &y, &z) to the application layer.
Driver responsibility
Example (LIS3DH)
Initialization
Write config registers, set full-scale range
Data read
Burst read 6 bytes, convert to mg
Interrupt handling
Configure INT1 pin, handle data-ready ISR
Error handling
Detect SPI timeout or invalid WHO_AM_I
4 / 5
During a debugging session your lead says: "Open the register map on page 42 of the datasheet and check the USART_SR register — the TXE bit should be set before we write."
What is a register map?
Correct: B. A register map (also called a register description or memory map) is the definitive reference for programming a peripheral directly. It tells you the address of every register, which bits control which behavior, whether a bit is read-only or read-write, and its value after reset. Misreading a register map is one of the most common sources of embedded bugs.
Column in register map
Meaning
Offset
Address relative to peripheral base address
Bit field
Which bits control which function
Access
rw (read-write), r (read-only), w1c (write 1 to clear)
Reset value
Register state after power-on or hardware reset
5 / 5
A firmware engineer explains: "The GPIO port is memory-mapped at 0x40020000 — we write to that address directly from C code to toggle the LED."
What does memory-mapped I/O mean?
Correct: B.Memory-mapped I/O (MMIO) is the dominant I/O model on ARM Cortex-M and most modern MCUs. Peripheral registers appear at fixed addresses in the same 4 GB address space as flash and SRAM. A C pointer (typically declared volatile uint32_t *) to that address lets you control hardware with an assignment. The volatile keyword is essential to prevent compiler optimization from eliminating the access.